'Intelli-Balancer' - PIC based Lipo Balancer
This page contains a design for a PIC-based lithium balancer. It has been implemented in two sizes, one for 2 to 3 cells and the other 2 to 7. High current and high cell count balancers are rare so these designs were developed to allow any current and any number of cells. I thank James Hopper for his patient and extensive help with the design.
PLEASE NOTE: BALANCING IS A NECESSARY BUT RISKY PROCESS
The design has the potential to be better than the most sophisticated commercial balancers. For instance it can be very efficient, it can balance to a greater degree of accuracy than most people can measure, and it can do this in a way that greatly reduces the risk of over-charge. Since its operation is controlled by a program this can be modified to make it work in any way you choose. It is also likely to be cheaper than all but the simplest designs. The device also has a mode to reduce voltages to a pre-set level for long term storage.
The core circuit is not complex but the LM358-based version on my site is vastly simpler and somewhat cheaper (although is less efficient and only handles up to 3 cells). The device is likely to need calibrating and its accuracy will depend either on how well you do that or on the quality of components you buy. Some of the parts are specialised so will only be available from large suppliers like Farnell.
I have used Microchip's 14 pin 16F688 chip for the small version and the 28 pin 16F886 for the large one. Larger PICs are available and the devices can be daisy-chained. Many other PICs will work with appropriate changes to the layout, cell count and program. The programs for the two devices are very simlar but there are differences which I touch on below. I've compiled the programs with the BoostC compiler. A licenced version (Standard) is needed due to the size of the programs.
The source code may be available on request for non-commercial use. I will require you to commit clearly to personal use only and to not share, distribute or post the source code elsewhere.
THESE DESIGNS ARE PROVIDED WITHOUT WARRANTY AND ARE FREE FOR PERSONAL NON-COMMERCIAL USE
I will describe the 7 cell version the most because this covers the key principles. Balancing is performed by placing a load across individual cells to discharge them until they have the same voltage as the lowest cells. The PIC has three channels for every cell, one to measure its voltage, one to drive the FET that activates the load and the third to drive an LED.
The PIC is a microprocessor which controls everything. It has a program so the logic can be adjusted to provide any action. A key feature is the prioritisation of the highest cells to avoid wasting effort on less out of balance cells thus improving efficiency and reducing the risk of over-charge.
1. The red LEDs will light up in turn (1 to 7) as the device powers up. This a ~2sec period that I call 'fumbling time' while you position things. This confirms it is plugged in correctly. If the LEDs do not come on quickly then you have probably connected it up the wrong way. I hope the balancer will withstand reverse polarity but I'd like someone else to test that!
2. The green LED will flash the number of cells found. You should satisfy yourself that it is getting this right. Should certain conditions not be met, all the red LEDs will come on and the green LED will give you a triple flash error code. This means the PIC is not happy with its determination of number of cells. Simply unplug and reconnect. Should it keep failing, check that cell voltages are all above 3v and under 4.3v. Remove from charger perhaps.
3. A red LED will illuminate for every cell that is out of balance. At least one cell will be the lowest and that cell's LED will always be off. If all cells are in balance, all the red LEDs will be off and the green LED will flash instead. The balancer may change its mind and toggle between the two modes as things settle.
4. The balancer program loops every ~3 seconds and at least one LED will blink as a heartbeat. If it is a red LED that blinks, this also reveals cells that are currently being discharged.
5. Should any cell fall below 3v, balancing will cease, all the red LEDs will come on and the green LED will give you a double flash. This should never happen so you should measure all cell voltages and determine the cause for the voltage falling that low.
The value of the load resistors (R35-40) determines the drain on the cells, speed of balancing and heat generated. The 8.2 ohm resistors suggested will result in ~0.5A load. This will generate about 2W of heat per resistor which sounds a small number but is a lot of heat! 2W will be about the limit for a flat sheet heat sink the size of the 3 cell balancer (38x30mm).
The photos show three SMD 27 ohm 1W resistors in parallel (=9 ohm) for each cell on the 3 cell balancer (~1.4W). Three resistors were unnecessary; two 18ohm 1W resistors (in parallel) would have been OK. Thin flat resistors are more effective at dissipating heat than the more common chunky high wattage resistors. The 1.4W shown generates 43'C, less if painted with a matt finish (see my black paint tests).
Heat becomes a problem as current rise because power (W) increases by the square of the current. So the program allows you to set how many resistors should be used at any one time. The program then apportions this capacity to the cell(s) that need balancing the most. So if you use only one resistor at a time, one high cell will get 100% of that capacity, two high cells will share it 50:50, etc.
The resistors should be on a separate board to avoid heating the main PCB. The approach used in the 3 cell version is very effective and is nice and compact. Balsa separates the two boards to impede heat transfer. A layer of balsa in the middle of the gap acts as a radiation barrier. Both ends are open to allow air to circulate.
The FETs (F1-7) switch the load on. 2-10A logic level N-channel FETs are likely to meet most people's needs. The FETs are powered by the cells they manage so this can range from about 3v to 4.2v. A low 'on' resistance (Rds) at these low gate voltages (Vgs) is desirable to ensure they switch fully and to reduce heat on the PCB.
The gate of a FET is held high by default (eg: by R33) when its transistor is off. So it is worth being aware that the FETs will conduct biefly when the balancer is first connected to the pack. They are switched off within micro-seconds of the PIC being powered up so this is not expected to cause problems. Very high current versions might benefit from an extra transistor to avoid this.
All but the lowest FET have two grounds. 'True' ground is at the bottom of the pack. The source of each FET is also connected to a 'virtual' ground, namely the negative terminal of the cell they manage. The transistors (Q1-6) pull the FET's gate low to switch them off. This pulls the gate towards true ground which is below the virtual ground. Most FETs can handle this but within limits. I've used FETs which allows Vgs +/- 12v. The resistors connected to the transistor's collectors (eg: R32 and R33) form a resistor divider to limit how low the FET's gate is pulled. The effect of these is noted on the circuit diagram. For instance, R33 will pull F7's gate to +4.2v on a fully charged cell when the tranny is off. The R32/R33 ratio will allow the gate to be pulled -11.5v (below F7's virtual ground) when the tranny is on.
The bottom FET is driven direct from the PIC because it's output voltage (0 to 5v) is perfect for logic level FETs. However, 5v relative to true ground is not enough to drive the other FETs which sit at higher levels as alluded to above. So NPN transistors (Q1-6) are used to perform a level shift. The tranny must be rated for the highest voltage you intend balancing.
Current through the tranny is limited by 10k resistors on the collector side. For the FETs whose gates can be pulled lower than their Vgs spec, this comprises two resistors (eg: R32/R33) as discussed above. To reduce the component count, 'digital transistors' have been used which include another 10k resistor (on the base).
PIC inputs cannot exceed 5v. The most common way of reducing a higher voltage is with a resistor divider network. However, this reduces the accuracy of the PIC's ADC by the same proportion. So reference diodes are used to drop as many volts as possible before using resistor dividers where necessary. These diodes are also called 'Voltage References'.
For example, 'cell 5' could be as high as 21v if fully charged to 4.2v/cell. Three 5v diodes reduce this to 6v. The 3k9 R18 and 1k R19 resistors form a ratio of 3900:4900 so 6v is reduced to 4.7v which allows a small leeway for higher voltages and component differences. With the 15v ref diode drop the lowest these values can measure is therefore 15v (ie: cells have to be above 3v each).
With a 5v reference voltage, the PIC can measure 0.0049v for each step of its 10bit ADC (5v/1023 steps) which it does on cells 1 to 3. The resistor divider for cell 5 makes this 0.0061v, barely any different. Cell6 is 0.0071v and cell 7 has a resolution of 0.0089v with the values shown. Most DVMs can only measure to 0.01v and can be out by 1 digit (ie: have an error of 0.01v). The PIC is prone to single step jitter but since it is working to a more accurate value it has the capability of being slightly more accurate than most DVMs.
Only certain reference diodes are suitable. While 2 lead packages may be available, most suitable types appear to have 3 leads with one not connected. Their data sheets usually depict the device with a diode symbol although some simply show it as having 'Vr' and 'Gnd' connections. The adjustable type with 3 working terminals or those with even more are not expected to be suitable. Examples that are known to work are National's LM4040 and LM4050, and the Zetex ZRAxxx, ZRBxxx or ZRCxxx (eg: ZRB500 for the 5v version).
2.5, 3.3, 4.1, 5.0v versions appear more readily available than the 8.2 and 10v versions. In addition to selecting appropriate voltage drops you need to consider voltage precision. The most accurate versions appear to be to 0.1%. This represents 0.005v in a 5v device. These would suit people who cannot measure voltages that small. If you have access to a bench meter that can measure in thousandths or smaller, then voltage accuracy is not critical because the program allows you to set a measured value.
The ref diodes need a minimum current through them to operate. So R12, R14, R16/R17 etc serve this purpose and provide the input impedance expected by the PIC's ADC. For example, the PICs used in the prototypes can have up to 10k on each input. 10k would also be a good choice to allow the minimum diode current. So instead of having two 10k resistors in parallel, the circuit has half that value (4k7 using one or two resistors).
If there is a slight disadvantage to using ref diodes it's that their voltage may change slightly with temperature. Numerous references are made to heat in this text and the load resistors are intended to be on a separate board with an air gap to reduce the effect on the main PCB. As shown, the temperature of the 3 cell board using 1 resistor at a time gains <10'C at sustained full use which has been quite pleasing. The voltages of the best ref diodes drift by up to 50ppm/'C (eg: LM4050). So 10v diodes may drift by 0.005v over 10' which is no problem. However, the cheaper diodes (eg: LM4040) may drift 3 times that amount and less effective cooling would exacerbate this. So if you are able to dissipate heat well, the cheaper diodes (say 100ppm) should be OK . Note that any drift will not affect final balance achieved as the load (and therefore temperature effect) reduces to nothing at the end. This is only a small precaution to avoid having the balancer trying to correct temperature-related voltage drift at peak usage.
The PIC needs an accurate reference voltage and a 5v linear regulator is suitable. Only a low current version is needed (eg: 100mA). The data sheet for the regulator will specify what filter capacitors are needed (C1 and C2). Diode D1 allows the regulator to be powered from the higher of cells 2 and 3 so the balancer can balance 2 or more cells. Since a 2 cell pack may be as low as 6v, an LDO (low dropout) regulator is recommended. A Schottky diode is recommended for D1 to reduce its voltage drop (eg: 0.3v at low currents). A dual diode has been chosen to reduce component count.
The circuit places a small load on the pack being balanced. When the number of cells exceeds what are being used to feed the regulator via D1, this will develop a tiny imbalance. The balancer will sort that out but if you want to reduce this you can add D2. D2 will allow the regulator to be automatically supplied with voltage from the highest of up to 5 cells instead of only up to 3 cells. In theory another diode could be added to allow cells 6 and 7 to power the regulator. In all cases, the input voltage of the regulator must permit whatever voltage you might supply it with. So with D1 you need 12.6v or higher, with D2 you need 21v or higher.
Cells are measured 10 times at the beginning of every cycle to average results and filter out any most significant errors. The highest cells are identified and discharged until they are all within 1 ADC step of the lowest (eg: accurate to 0.005v). Voltages have to be stable for five cycles (~15sec) to be considered balanced. To reduce toggling between being balanced and not, the cells have to drift by over 2 ADC steps before deemed to be out of balance again.
Considerable effort has been made to program it so that the balancer discharges quickly but avoids 'going too far' and discharging the lowest cell. Voltages drop under load and recover quickly but not completely when the load is removed. So as the highest voltages approach the lowest, the program finds a dynamic equilibrium between 'on' and 'off' times to achieve balance in an efficient manner.
The program is commented heavily so you should be able to follow the detail of its logic. However, it comprises over 1,400 lines so takes some effort to follow. The graphs below illustrate some of the early code. I've left them there because it reveals typical behaviours but the logic has changed.
When lithiums need to be stored for long periods, they should apparently be left at around 3.8v. The device has a mode which can reduce all cells to a chosen level.
The circuits are drawn using Eagle. I made my boards with Press-n-Peel Blue using a laser printer and ferric-chloride acid. Provided you clean the board well and ensure both the board and PnP are dust free before ironing the pattern on, you should get good results. Iron the film on firmly but not with all your might! It's worth having some well-washed cleaning cloths so you know they are grease/silicon free (use these for preparing the board and film).
The board is double-sided with the bottom being a ground plane without any pattern. So you need to protect that side from the acid with packaging tape or similar when etching. The easiest and neatest way to do the vias between the top and bottom is with wire that is a snug fit in the holes you drill. Crimp the wire with pliers to make it jam better in the holes. Then snip both ends off with side cutters leaving about 0.5mm proud and solder them.
The prototypes were made with SMD components but through-hole parts are available for everything. Vero or Matrix board versions are feasible. I made a compact programming plug with 6 pins from an RJ11 socket and a clothes peg. This needs careful alignment on the PCB but works very well with a PicKit2 USB programmer.
The 3 cell version has a temperature sensor but this is not used by the program in any intelligent way so there would be no great need to install it. It was built in to the first prototype to assess the heating issues.
Both versions log some key data automatically every time it is used (it gets overwritten). The PIC in the 7 cell version can also write to its own program memory (4k of ROM available) which is a valuable aid if you want to analyse what it is doing. This was used extensively to test the program.
If the PIC were to hang, the watch-dog timer is enabled. This would reset the device automatically which should solve the problem. A count of these events is logged in EEPROM. Active monitoring of both prototypes has not revealed the PIC ever hanging so the code appears stable. Both prototypes have been in use for some time without any problems.
If the PIC or any of the other components were to fail, this could utterly drain some or all cells. This is no different to any other balancing circuit. Although bad for the cells, due to the resistive load, this type of failure is unlikely to be dramatic in any way (as 'charge guard' type circuits can be). As usual, always disconnect balancers after use.
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